Reuse-based Analytical Models for Caches
نویسندگان
چکیده
We develop a reuse distance/stack distance based analytical modeling framework for efficient, online prediction of cache performance for a range of cache configurations and replacement policies LRU, PLRU, RANDOM, NMRU. Such a predictive framework can be extremely useful in selecting the optimal parameters in a dynamic reconfiguration environment that performs power-shifting or resource reallocation through cache partitioning. Our framework unifies existing cache miss-rate prediction techniques such as Smith’s associativity model, Poisson variants, and hardware way-counter based schemes. We also show how to adapt way-counters to work when the number of sets in the cache changes. We propose a novel low-overhead hardware mechanism to estimate reuse distance/stack distance distributions using a combination of set-sampling and time-sampling. This can be used even in cases where using way-counters is not possible, e.g. RANDOM/NMRU replacement policies.
منابع مشابه
Static Analysis of Parameterized Loop Nests for Energy EÆcient Use of Data Caches
Caches are an important part of architectural and compiler low-power strategies by reducing memory accesses and energy per access. In this paper, we examine eÆcient utilization of data caches for low power in an adaptive memory hierarchy. We focus on the optimization of data reuse through the static analysis of line size adaptivity. We present an approach that enables the quanti cation of data ...
متن کاملCache Power Budgeting for Performance
Power is arguably the critical resource in computer system design today. In this work, we focus on maximizing performance of a chip multiprocessor (CMP) system, for a given power budget, by developing techniques to budget power between processor cores and caches. Dynamic cache configuration can reduce cache capacity and associativity, thereby freeing up chip power, but may increase the miss rat...
متن کاملModeling Energy Dissipation in Low Power Caches
Modern microprocessors employ one or two levels of on–chip caches that are implemented using static RAM and take up a large portion of the Silicon real estate, consuming a significant amount of power. We present detailed analytical models for estimating the energy dissipated in conventionally–organized caches as well as caches that are organized to have reduced energy dissipations. We also vali...
متن کاملUnderstanding Multicore Cache Behavior of Loop-based Parallel Programs via Reuse Distance Analysis
Understanding multicore memory behavior is crucial, but can be challenging due to the cache hierarchies employed in modern CPUs. In today’s hierarchies, performance is determined by complex thread interactions, such as interference in shared caches and replication and communication in private caches. Researchers normally perform simulation to sort out these interactions, but this can be costly ...
متن کاملAnalytical Modeling of Set-Associative Cache Behavior
Cache behavior is complex and inherently unstable, yet is a critical factor aaecting program performance. A method of evaluating cache performance is required, both to give quantitative predictions of miss-ratio, and information to guide optimization of cache use. Traditional cache simulation gives accurate predictions of miss-ratio, but little to direct optimization. Also, the simulation time ...
متن کاملذخیره در منابع من
با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید
عنوان ژورنال:
دوره شماره
صفحات -
تاریخ انتشار 2011